Texas Instruments Automobile Battery Charger SLUU477 User Manual

User's Guide  
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar  
Charger with Power Path  
This user's guide describes the features and operation of the bq24210EVM Evaluation Module (EVM). The  
EVM assists users in evaluating the bq24210 solar chager. The EVM is also called the HPA678. The  
manual includes the bq24210EVM bill of materials, board layout, and schematic.  
Contents  
1
Introduction .................................................................................................................. 2  
1.1  
1.2  
1.3  
1.4  
1.5  
EVM Features ...................................................................................................... 2  
General Description ................................................................................................ 2  
I/O Description ...................................................................................................... 2  
Control and Key Parameters Setting ............................................................................ 3  
Recommendd Operating Conditions ............................................................................ 3  
2
Test Summary ............................................................................................................... 4  
2.1  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
Definitions ........................................................................................................... 4  
Safety ................................................................................................................ 4  
Quality ............................................................................................................... 4  
Apparel .............................................................................................................. 4  
Equipment ........................................................................................................... 5  
Equipment Setup ................................................................................................... 5  
Procedure ........................................................................................................... 6  
3
4
PCB Layout Guideline ...................................................................................................... 6  
Bill of Materials, Board Layout and Schematics ........................................................................ 7  
4.1  
4.2  
4.3  
Bill of Materials ..................................................................................................... 7  
Board Layout ....................................................................................................... 8  
Schematics ........................................................................................................ 11  
List of Figures  
1
2
3
4
5
Original Test Setup for HPA678 (bq24210 EVM).......................................................................  
Top Assembly ...............................................................................................................  
Top Layer ....................................................................................................................  
Bottom Layer............................................................................................................... 10  
bq24210 EVM Schematic ................................................................................................ 11  
List of Tables  
1
2
3
4
I/O Description...............................................................................................................  
Control and Key Parameters Setting .....................................................................................  
Recommendd Operating Conditions .....................................................................................  
Bill of Materials ..............................................................................................................  
1
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
© 2010, Texas Instruments Incorporated  
 
Introduction  
1.4 Control and Key Parameters Setting  
Table 2. Control and Key Parameters Setting  
Jack  
Description  
Factory Setting  
Jumper OFF (external setting)  
JP1  
Programs the fast-charge current setting. 500mA when JP1 ON; external setting  
when JP1 OFF  
JP2  
JP3  
Connect /EN and /PG together when JP2 ON to enable charger when power present Jumper OFF (external /EN)  
Programs the input voltage regulation threshold. 4.5V when JP3 ON; external setting Jumper OFF (external setting)  
when JP3 OFF.  
JP4  
JP5  
Limited power charge mode (LPCM) when JP4 ON; normal operation when JP4 OFF Jumper OFF (normal operation)  
Select external TS input or internal TS setting  
1-2 : External TS input  
Jumper ON 1-2 (external TS)  
2-3 : Internal TS setting  
JP6  
JP7  
The pull-up power source supplies for the LEDs  
1-2 : BAT  
2-3 : VBUS  
Jumper ON 2-3 (VBUS)  
Charger ON/OFF command  
1-2 : OFF  
Jumper ON 1-2 (charger OFF)  
2-3 : ON  
1.5 Recommendd Operating Conditions  
Table 3. Recommendd Operating Conditions  
Description  
Min Typ  
Max  
7.3  
4.2  
0.8  
0.8  
125  
Unit  
V
Notes  
Supply voltage, VBUS  
Battery voltage, VBAT  
Supply current  
Input voltage  
4.5  
0
Voltage applied at VBAT terminal of J2  
Maximum input current  
Battery charge current  
V
0
A
Charge current, Ichrg  
0
A
Operating junction temperature  
range, TJ  
0
°C  
An external resistor is used to program the VBUS_DPM. The programming resistor, RVDPM is dictated by  
the following equation:  
VBUS_  
(
- VBUS_DPM_1  
)
DPM  
RVDPM  
=
KVBUS_DPM  
(1)  
Where:  
VBUS_DPM is the desired input voltage regulation voltage threshold;  
VBUS_DPM_1 is the built-in offset threshold, nominally 3.5V  
KVBUS_DPM is a gain factor found in the electrical specification.  
If VDPM pin is shorted to VSS, the VBUS_DPM should be clamped to 3.65V.  
If the VDPM pin is floated (open circuit), the IC operates in Battery Tracking Mode. In this case, VBUS  
DPM threshold is internally set as VTRK, which is BAT+100mV (BAT>3.65V) or 3.75V (BAT3.4V).  
Connecting JP3 set 4.5V VDPM on EVM.  
An external resistor is used to program the output current (50-800mA). The equation for charge current is:  
KISET  
RISET  
=
IOUT  
(2)  
Where, IOUT is the desired fast charge current; KISET is a gain factor found in the spec.  
The termination and pre-charge current are internally set at 10% and 20% of fast charge current  
respectively. The pre-charge-to-fast-charge, Vlowv threshold is set to 2.5V.  
Connecting JP1 set 500mADC for fast charge current and 100mADC for pre-charge current on EVM.  
3
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
© 2010, Texas Instruments Incorporated  
 
       
Test Summary  
2
Test Summary  
2.1 Definitions  
This procedure details how to configure the HPA678 evaluation board. On the test procedure, the  
following naming conventions are followed.  
VXXX :  
External voltage supply name (VBUS, VBAT)  
LOADW:  
V(TPyyy):  
V(Jxx):  
External load name (LOADR, LOADI)  
Voltage at internal test point (TPyyy). For example, V(TP1) means the voltage at TP1.  
Voltage at jack terminal (Jxx).  
V(XXX):  
Voltage at (XXX). For example, V(VDPM) means the voltage at the test point which is  
marked "VDPM".  
V(XXX, YYY): Voltage across point XXX and YYY.  
I(JXX(YYY)):  
Jxx(BBB):  
Jxx ON :  
Current going out from the YYY terminal of jack XX.  
Terminal or pin BBB of jack xx  
Internal jumper Jxx terminals are shorted  
Internal jumper Jxx terminals are open  
Jxx OFF:  
Jxx (-YY-) ON: Internal jumper Jxx adjacent terminals marked as "YY" are shorted  
Measure:A,B Check specified parameters A, B. If measured values are not within specified limits the  
unit under test has failed.  
Observe A,B Observe if A, B occur. If they do not occur, the unit under test has failed.  
Assembly drawings have location for jumpers, test points and individual components  
2.2 Safety  
1. Safety Glasses are to be worn.  
2. This test must be performed by qualified personnel trained in electronics theory and understand the  
risks and hazards of the assembly to be tested.  
3. ESD precautions must be followed while handling electronic assemblies while performing this test.  
4. Precautions should be observed to avoid touching areas of the assembly that may get hot or present a  
shock hazard during testing.  
2.3 Quality  
1. Test data shall be made available upon request by Texas Instruments.  
2.4 Apparel  
1. Electrostatic smock  
2. Electrostatic Gloves or finger cots  
3. Safety Glasses  
4. Ground ESD wrist strap  
4
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
SLUU477December 2010  
© 2010, Texas Instruments Incorporated  
 
         
Test Summary  
2.5 Equipment  
2.5.1  
Power Supplies  
Power Supply #1 (PS#1): a power supply capable of supplying 20-V at 1-A is required.  
2.5.2  
Loads  
LOAD #1 A 20V (or above), 1A (or above) electronic load that can operate at constant current and  
constant voltage mode.  
Or: equivalent.  
2.5.3  
Meters  
Four Fluke 75 multi-meters, (equivalent or better)  
Or: Two equivalent voltage meters and two equivalent current meters.  
The current meters must be capable of measuring 1A+ current.  
2.6 Equipment Setup  
1. Set the power supply #1 (PS#1) for 6.5V ± 200mVDC, 1A ± 0.1A current limit and then turn off supply.  
2. Connect the output of PS#1 in series with a current meter (multi-meter) to J1 (VBUS, GND).  
3. Connect a voltage meter across J1 (VBUS, GND).  
4. Connect Load #1 in series with a current meter to J2 (VBAT, GND). Turn off Load #1.  
5. Connect a voltage meter across J2 (VBAT, GND).  
6. Check all jumper shunts. JP1: OFF; JP2: OFF; JP3: OFF; JP4: OFF; JP5: connect 1-2 (External TS);  
JP6: connect 2-3 (VBUS); JP7: connect 1-2 (charger OFF).  
BQ24210 EVM  
HPA678  
J2  
J1  
I
Power supply  
#1  
BAT  
Iin  
I
GND  
Load #1  
V
IBAT  
GND  
TS  
V
VBUS  
U1  
APPLICATION CIRCUIT  
JP3  
JP1  
LED  
CHG  
PG  
D1  
D2  
J4  
J3  
JP4  
JP5  
JP7  
JP6  
JP2  
Figure 1. Original Test Setup for HPA678 (bq24210 EVM)  
5
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
© 2010, Texas Instruments Incorporated  
 
     
PCB Layout Guideline  
2.7 Procedure  
2.7.1  
2.7.2  
2.7.3  
Power Supply  
Make sure EQUIPMENT SETUP steps are followed.  
Disconnect LOAD #1. Turn on PS#1.  
Measure V(J1(VBUS)) = 6.5V ± 200mV  
Measure V(J2(VBAT)) = 0V ± 200mV  
Measure V(J4(VTSB)) = 0V ± 200mV  
Observe D1 (PG) ON, D2 (CHG) OFF  
Charger Enable and Battery Detection  
Connect JP1; Connect 2-3 of JP7 (Charger ON)  
Measure V(J4(VTSB)) = 2.2V ± 300mV  
Connect 2-3 of JP5 (Internal TS);  
Adjust R6 until V(JP4-1) = 0.7V ± 200mV  
Measure V(J2(VBAT))=4.2V 200mV  
Observe D1 (PG) ON, D2 (CHG) OFF  
Charge Current/Voltage Regulation  
Reconnect LOAD#1. Turn on. Use the constant voltage mode.  
Connect JP1; Set the output voltage to be 2.2V.  
Measure I(J2(VBAT)) = 0.1A ± 50mA  
Observe D1 (PG) ON, D2 (CHG) ON  
Increase the voltage of LOAD#1 to be 3.5 V.  
Measure I(J2(VBAT)) = 0.5A ± 100mA  
Observe D1 (PG) ON, D2 (CHG) ON  
2.7.4  
2.7.5  
3
VDPM ((Input Voltage Regulation) Setting)  
Disconnect J3, measure the resistance between J3-1 to GND (6.65k±10%)  
Test Complete  
Turn off the power supply and remove all connections from the unit under test (UUT).  
PCB Layout Guideline  
1. It is critical that the exposed thermal pad on the backside of the bq24210 package be soldered to the  
PCB ground. Make sure there are sufficient thermal vias right underneath the IC, connecting to the  
ground plane on the other layers.  
2. Decoupling capacitors for VBUS, BATC should make the interconnections to the IC as short as  
possible.  
3. Take the EVM layout for design reference.  
6
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
SLUU477December 2010  
© 2010, Texas Instruments Incorporated  
 
   
Bill of Materials, Board Layout and Schematics  
4
Bill of Materials, Board Layout and Schematics  
4.1 Bill of Materials  
Table 4. Bill of Materials  
-001 RefDes  
Value  
Description  
SIZE  
Part Number  
STD  
MFR  
1
2
1
0
2
1
1
1
1
1
4
C1  
10 µF  
Capacitor, Ceramic, 25V,X7R, 10%  
Capacitor, Ceramic, 25V, X7R, 10%  
Capacitor, Ceramic, 6.3V, X7R, 10%  
Capacitor, Ceramic, 25V, X7R, 10%  
Diode, LED, Red, 1.8-V, 20-mA, 20-mcd  
Diode, Zener, 5.1V, 350-mW  
1206  
STD  
C2, C4  
C3  
0.1 µF  
0603  
STD  
STD  
10 µF  
0805  
STD  
STD  
C5, C6  
D1, D2  
D3  
Open  
0603  
STD  
STD  
LTST-C190CKT  
BZX84C5V1-7  
PEC02SAAN  
ED555/3DS  
PEC05SAAN  
PEC03SAAN  
0603  
LTST-C190CKT  
BZX84C5V1-7  
PEC02SAAN  
ED555/3DS  
PEC05SAAN  
PEC03SAAN  
PEC02SAAN  
Liteon  
Diodes  
Sullins  
OST  
SOT-23  
J1  
Header, Male 2-pin, 100mil spacing,  
Terminal Block, 3-pin, 6-A, 3.5mm  
Header, Male 5-pin, 100mil spacing  
Header, Male 3-pin, 100mil spacing  
Header, 2-pin, 100mil spacing,  
0.100 inch x 2  
0.41 x 0.25 inch  
0.100 inch x 5  
0.100 inch x 3  
0.100 inch x 2  
J2  
J3  
Sullins  
Sullins  
Sullins  
J4  
JP1, JP2, PEC02SAAN  
JP3, JP4  
3
JP5, JP6, PEC03SAAN  
JP7  
Header, 3 pin, 100mil spacing,  
0.100 inch x 3  
PEC03SAAN  
Sullins  
1
2
1
1
1
1
0
R1  
21.5k  
1.50K  
750  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Resistor, Chip, 1/16W, 1%  
Potentiometer, 1/4 Cermet, 12-Turn, Top-Adjust  
Resistor, Chip, 1/16-W, 1%  
Test Point, 0.020 Hole  
0603  
STD  
STD  
STD  
STD  
Std  
R2, R4  
R3  
0603  
STD  
0603  
STD  
R5  
6.65k  
100k  
4.75k  
0603  
Std  
R6  
0.25 x 0.17 inch  
0603  
3266W-1-104LF  
Bourns  
STD  
STD  
R7  
STD  
STD  
TP1, TP2, Open  
TP3  
1
U1  
BQ24210DCQ  
IC, 800mA, Single-Input, Single Cell Li-Ion Battery Solar  
Charger with bi-directional Power Path  
TDFN-10  
0.1  
BQ24210DCQ  
TI  
7
1
1
Shunt, 100-mil, Black  
929950-00  
HPA678  
3M  
PCB  
Any  
Label  
1.25 x 0.25 inch  
THT-13-457-10  
Brady  
7
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
© 2010, Texas Instruments Incorporated  
 
     
Bill of Materials, Board Layout and Schematics  
4.2 Board Layout  
Figure 2. Top Assembly  
8
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
SLUU477December 2010  
© 2010, Texas Instruments Incorporated  
 
   
Bill of Materials, Board Layout and Schematics  
Figure 3. Top Layer  
9
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
© 2010, Texas Instruments Incorporated  
 
 
Bill of Materials, Board Layout and Schematics  
Figure 4. Bottom Layer  
10  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
SLUU477December 2010  
© 2010, Texas Instruments Incorporated  
 
 
Bill of Materials, Board Layout and Schematics  
4.3 Schematics  
Figure 5. bq24210 EVM Schematic  
11  
SLUU477December 2010  
800mA, Single-Input, Single Cell Li-Ion Battery Solar Charger with Power Path  
© 2010, Texas Instruments Incorporated  
 
   
Evaluation Board/Kit Important Notice  
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION  
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the  
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are  
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,  
including product safety and environmental measures typically found in end products that incorporate such semiconductor  
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding  
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the  
technical requirements of these directives or other related directives.  
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30  
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY  
SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING  
ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.  
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all  
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take any and all appropriate precautions with regard to electrostatic discharge.  
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER  
FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.  
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.  
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of  
patents or services described herein.  
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the  
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No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or  
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FCC Warning  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION  
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and  
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of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this  
equipment in other environments may cause interference with radio communications, in which case the user at his own expense  
will be required to take whatever measures may be required to correct this interference.  
EVM Warnings and Restrictions  
It is important to operate this EVM within the input voltage range of 4.5 V to 7.3 V and the output voltage range of 0 V to 4.2 V .  
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are  
questions concerning the input range, please contact a TI field representative prior to connecting the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the  
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load  
specification, please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than 60°C. The EVM is designed to  
operate properly with certain components above 125°C as long as the input and output ranges are maintained. These components  
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of  
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near  
these devices during operation, please be aware that these devices may be very warm to the touch.  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2010, Texas Instruments Incorporated  
 
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
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